A Quadrature Switched Capacitor Power Amplifier
A Quadrature Switched Capacitor Power Amplifier
复制标题
DOI：
10.1109/jssc.2015.2496956
复制
发表时间：
2016-01
影响因子：
5.4
通讯作者：
Wen Yuan;V. Aparin;J. Dunworth;L. Seward;J. Walling
中科院分区：
文献类型：
--
作者：
Wen Yuan;V. Aparin;J. Dunworth;L. Seward;J. Walling
提出了一种基于65nm CMOS的全数字g类正交开关电容功率放大器（Q-SCPA）。它在共享电容器阵列上结合了同相(I)和正交(Q)信号。I/Q信号在电荷域中进行数字加权和组合。正交求和导致3 dB的信号损失；因此，Q-SCPA采用g类双电源架构来提高回退效率。与极性/EER对应物不同，Q-SCPA不需要宽带相位调制器或延迟匹配电路。Q-SCPA的峰值输出功率为20.5 dBm，峰值PAE为20%。在10mhz， 64qam的LTE信号下进行测试，ACLR <；- 30dbc，带EVM <；4%的均方根。
This paper presents an all-digital class-G quadrature switched-capacitor power amplifier (Q-SCPA) implemented in 65 nm CMOS. It combines in-phase (I) and quadrature (Q) signals on a shared capacitor array. The I/Q signals are digitally weighted and combined in the charge domain. Quadrature summation results in a 3 dB signal loss; Hence the Q-SCPA utilizes a class-G dual-supply architecture to improve efficiency at backoff. Unlike polar/EER counterparts, the Q-SCPA requires no wideband phase modulator or delay matching circuitry. The Q-SCPA delivers a peak output power of 20.5 dBm with a peak PAE of 20%. It is measured with a 10 MHz, 64 QAM LTE signal, and achieves an ACLR of <;-30 dBc, with an EVM <; 4%-rms.