A single-electron-transistor logic gate family and its application - Part I: basic components for binary, multiple-valued and mixed-mode logic
A single-electron-transistor logic gate family and its application - Part I: basic components for binary, multiple-valued and mixed-mode logic
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DOI：
10.1109/ismvl.2004.1319952
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发表时间：
2004-05
期刊：
影响因子：
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通讯作者：
K. Degawa;T. Aoki;T. Higuchi;H. Inokawa;Yasuo Takahashi
中科院分区：
文献类型：
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作者：
K. Degawa;T. Aoki;T. Higuchi;H. Inokawa;Yasuo Takahashi
本文提出了一种基于模型的研究SET（单电子晶体管）逻辑门的家庭综合二进制和MV（多值）逻辑电路。SET与MOS晶体管结合使用，可以紧凑地实现具有周期性传输特性的基本逻辑功能。这些基本SET逻辑门可用于以高度灵活的方式实现二进制逻辑电路、MV逻辑电路和二进制MV混合逻辑电路。作为一个例子，本文介绍了各种并行计数器的进位传播自由算术，MV信号被有效地用于实现更高的功能，以较低的硬件复杂度的设计。
This paper presents a model-based study of an SET (single-electron-transistor) logic gate family for synthesizing binary and MV (multiple-valued) logic circuits. The use of SETs combined with MOS transistors allows a compact realization of basic logic functions that exhibit periodic transfer characteristics. These basic SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV-mixed logic circuits in a highly flexible manner. As an example, this paper describes the design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.