ATTC (@C): Addressable-TLB based Translation Coherence

ATTC (@C): Addressable-TLB based Translation Coherence
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ATTC (@C):基于可寻址 TLB 的翻译一致性

DOI:
10.1145/3410463.3414653
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发表时间:
2020
期刊:
ACM International Conference on Parallel Architectures and Compilation Techniques (PACT
影响因子:
--
通讯作者:
John, Lizy K.
John, Lizy K.
中科院分区:
--
文献类型:
--
作者:
Gugale, Harsh;Gulur, Nagendra;Marathe, Yashwant;John, Lizy K.

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异构存储系统越来越流行,但它们面临着来自页面重映射的翻译一致性开销的重大挑战。翻译一致性通常在软件中实现,对于虚拟化平台中的某些应用程序,可能会消耗高达50%的运行时。在本文中,我们提出了ATTC -可寻址TLB为基础的翻译一致性,硬件翻译一致性方案,消除了几乎所有的开销与基于软件的一致性机制,并克服了现有的硬件方案的挑战。与需要片上TLB标签来实施一致性并且能够仅跟踪访客页表或主机页表的最后一级页表条目的其他提议(HATRIC、UNITD)不同,ATTC跟踪访客页表和主机页表两者的改变而不需要L1、L2 TLB中的任何附加元数据。ATTC使用DRAM中的可寻址TLB(ATLB)(类似于[41]中的TLB),为客户机和主机页表更新统一实施“一致点”。将主机物理页面映射到ATLB位置的逆映射表(INVTBL -存在于DRAM中)有助于精确跟踪转换。我们详细研究了新兴的混合存储器组织(DRAM和NVM的混合)的建议ATTC计划,并表明ATTC几乎消除了所有的翻译一致性开销,平均提高了35.7%,在虚拟化环境中的基线软件一致性计划和7.4%的硬件HATRIC计划。
Heterogeneous memory systems are getting popular, however they face significant challenges from translation coherence overheads from page remappings. Translation coherence, which is typically implemented in software, can consume up to 50% of the runtime for some applications in virtualized platforms. In this paper, we propose ATTC -- Addressable TLB-based Translation Coherence, a hardware translation coherence scheme which eliminates almost all of the overheads associated with software-based coherence mechanisms, and overcomes the challenges in existing hardware schemes. Unlike other proposals (HATRIC, UNITD) that require on-chip TLB tags to enforce coherence and are capable of tracking only the last level page table entries of either the guest or host page tables, ATTC tracks changes to both guest and host page tables without requiring any additional metadata in L1, L2 TLBs. ATTC enforces a "point of coherence'' uniformly for both guest and host page table updates using an addressable TLB (ATLB) in the DRAM akin to the one in [41]. An inverse mapping table (INVTBL - present in DRAM) that maps host physical pages to ATLB locations helps to precisely track translations. We study the proposed ATTC scheme in detail for an emerging hybrid memory organization (a mix of DRAM and NVM) and show that ATTC practically eliminates all translation coherence overheads, yielding an average improvement of 35.7% over a baseline software coherence scheme in virtualized environment and 7.4% over the hardware HATRIC scheme.
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