Primary single event effect studies on Xilinx 28-nm System-on-Chip (SoC)

Primary single event effect studies on Xilinx 28-nm System-on-Chip (SoC)
复制标题

DOI:
10.1016/j.nima.2016.05.120
复制
发表时间:
2016-09
影响因子:
1.4
通讯作者:
Yao Zhang;Shuhuan Liu;Xuecheng Du;Yuan Yuan-Yuan;Chaohui He;X. Ren;Xiaozhi Du;Yonghong Li
Yao Zhang;Shuhuan Liu;Xuecheng Du;Yuan Yuan-Yuan;Chaohui He;X. Ren;Xiaozhi Du;Yonghong Li
中科院分区:
物理与天体物理3区
文献类型:
--
作者:
Yao Zhang;Shuhuan Liu;Xuecheng Du;Yuan Yuan-Yuan;Chaohui He;X. Ren;Xiaozhi Du;Yonghong Li

文献摘要

被引文献

相似文献

本文通过仿真和实验研究了Xilinx 28 nm系统级芯片的单粒子效应。在仿真过程中,利用Cadence工具设计了SoC中与非门和触发器的典型结构。考虑多层布线和到达敏感区前的能量损失,将各种辐射模拟为脉冲电流源。对电路模块在脉冲电流源作用下发生单粒子效应和故障进行了仿真。观察了脉冲电流信号在不同敏感节点处或电路在不同条件下工作时,电路模块输出的变化。对典型模块中的敏感节点和测试程序失效的可能原因进行了初步研究。在实验过程中,分别用α粒子、质子和激光辐照SoC芯片。辐照测试结果表明,SoC典型模块发生单粒子翻转(SEU),与模拟结果一致。
Single Event Effect (SEE) on Xilinx 28-nm System-on-Chip (SoC) was investigated by both simulation and experiments in this study. In the simulation process, typical structure of NAND gate and flip-flop in SoC were designed using Cadence tool. Various kinds of radiation were simulated as pulsed current source in consideration of multilayer wiring and energy loss before reaching the sensitive area. The circuit modules were simulated as SEE occurred and malfunctioned when pulsed current source existed. The changes of the circuit modules output were observed when pulsed current signals were placed at different sensitive nodes or the circuit operated under different conditions. The sensitive nodes in typical modules and the possible reasons of test program malfunction were primarily studied. In the experimental process, SoC chip was irradiated with α particles, protons and laser respectively. The irradiation test results showed that Single Event Upset (SEU) occurred in typical modules of SoC, in accordance with the simulation results.