Built-In Self-Heating Thermal Testing of FPGAs

Built-In Self-Heating Thermal Testing of FPGAs
复制标题

FPGA 的内置自热热测试

DOI:
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发表时间:
2016
影响因子:
2.9
通讯作者:
M. Tahoori
M. Tahoori
中科院分区:
计算机科学3区
文献类型:
--
作者:
A. Amouri;Jochen Hepp;M. Tahoori

文献摘要

被引文献

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现场可编程门阵列(FPGA)采用最先进的CMOS技术节点设计和制造,以满足性能和功耗要求。这使得它们容易受到许多制造和可靠性挑战的影响。增加芯片温度是一个主要的可靠性问题,因为各种故障机制在高芯片温度下加速,这需要热感知测试来检测它们。外部设备,如热室,通常用于将芯片加热到所需的温度,以便进行测试。然而,这些外部设备存在许多限制,这使得FPGA的热感知测试成为一个具有挑战性的过程。提出了一种利用FPGA内部资源构建受控自加热元件的热感知测试方法。这些受控的SHE分布在整个FPGA中,并与测试方案集成,以生成测试所需的温度曲线,因此不需要用于加热FPGA的外部设备。我们提出了两种不同类别的SHE集成技术,用于不同的测试目的。第一个用于内建自测试,第二个用于应用程序相关测试。这些技术被应用于有代表性的测试用例。实验结果表明,可以实现宽范围的最高芯片温度(从50 °C到125 °C的Virtex-5 FPGA),具有高精度(±1 °C)。
Field programmable gate arrays (FPGAs) are designed and fabricated using the most advanced CMOS technology nodes to meet performance and power demands. This makes them susceptible to many manufacturing and reliability challenges. Increasing chip temperature is a major reliability concern since various failure mechanisms are accelerated at high chip temperature, which require thermal-aware testing to detect them. External devices like thermal chambers are usually used to heat up the chip to a desired temperature in order to apply the test. However, there are many limitations for these external devices, which make the thermal-aware testing of the FPGA a challenging process. In this paper, thermal-aware testing of FPGAs using built-in self-heating is presented, in which the internal resources of FPGA are used to build controlled self-heating elements (SHEs). These controlled SHEs are distributed across the FPGA and integrated with the test scheme to generate the required temperature profile for testing, and thus no external devices for heating up the FPGA are needed. We present two different categories of SHEs integration techniques for different testing purposes. The first one is for built-in self-test, and the second one is for application-dependent testing. The techniques are applied on representative test cases. The experimental results show that a wide range of maximum chip temperatures can be achieved (from 50 °C up to 125 °C on Virtex-5 FPGA) with a high accuracy (±1 °C).