Delayed Universal Logic Modules and Sequential Machine Synthesis
Delayed Universal Logic Modules and Sequential Machine Synthesis
复制标题
延迟通用逻辑模块和顺序机综合
DOI：
10.1109/t-c.1975.224323
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发表时间：
1975
期刊：
影响因子：
--
通讯作者：
N. Houtte
中科院分区：
文献类型：
--
作者：
T. L. Van;N. Houtte
一个n变量通用逻辑模块（ULM-n）可以被认为是一个2n合1多路复用器（逆二叉树），其代码由外部变量的表示确定。这种解释允许合成的顺序机。从状态转移图出发，任何时序机都可以用延迟乌尔姆和或门来实现。本文将Weiner和Hopcroft的分解概念推广到n变量时序机的统一综合。
A universal logic module of n variables (ULM-n) can be considered as a 2n-in-1 multiplexer (inverse binary tree) whose code is determined by the presentation of external variables. This interpretation permits synthesis of sequential machines. Starting from the state transition map, any sequential machine can be realized by delayed ULM's and OR gates. The decomposition concept of Weiner and Hopcroft is generalized to form a uniform synthesis of n-variable sequential machines.