Graph-based quantum integrated circuits using III-V mulch-branch nanowire networks and their nano-Schottky gate control

Graph-based quantum integrated circuits using III-V mulch-branch nanowire networks and their nano-Schottky gate control
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使用 III-V 覆盖分支纳米线网络及其纳米肖特基栅极控制的基于图的量子集成电路

DOI:
10.1109/drc.2002.1029536
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发表时间:
2002
期刊:
60th DRC. Conference Digest Device Research Conference
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--
通讯作者:
H. Hasegawa
H. Hasegawa
中科院分区:
--
文献类型:
--
作者:
S. Kasai;M. Yumoto;T. Fukushi;T. Muranaka;H. Hasegawa

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Beyond the scaling limit of Si CMOS LSls, one envisages nanoelectronics based on quantum devices. To realize quantum LSls (Q-LSIs), however, a novel architecture is required that is suitable to non-robust and charge-sensitive quantum devices which manipulate a single or a few electrons. The cascaded logic gate architecture in Si LSIs is utterly unsuitable. The purpose of this paper is to propose a graph-based Q-LSI architecture and to investigate its basic feasibility by forming of high-density GaAs-based and InP-based multi-branch nanowire networks and controlling them by nanometer-scale Schottky gates.
S.Kasai:“基于二维电子气肖特基面内栅极和包裹栅极控制的具有单点和多点的 GaAs 单电子器件的制造和表征”Jpn.J.Appl.Phys。
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