Polarity tunable complementary logic circuits
Polarity tunable complementary logic circuits
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DOI：
10.1007/s11432-022-3621-0
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发表时间：
2023-08
期刊：
影响因子：
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通讯作者：
Chen Pan;Jing Shi;Pengfei Wang;Shuang Wang;Cong Wang;Bin Cheng;S. Liang;Feng Miao
中科院分区：
文献类型：
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作者：
Chen Pan;Jing Shi;Pengfei Wang;Shuang Wang;Cong Wang;Bin Cheng;S. Liang;Feng Miao
对于器件M1（参见图1（B）的顶部），输入信号A、B和C分别注入源极和两个栅极，输出信号F1在漏极端子处被感测。PN、PP和NN结的正向偏置允许从器件M1的源极端子向漏极端子传输高电平信号（A= 1）。这样，输入电压信号对电流输出的依赖关系可以转化为相应的布尔代数A（B+ C）= 1。NP结的反向偏置使得能够防止源极端处的低电平信号（A= 0）被传输到器件M1的漏极端。这对应于一个布尔代数A BC= 1。对于器件M2中的高电平输出信号，可以获得类似的布尔代数F2= C（B+ A）+CBA = 1，其中输入信号端子C和A被交换（参见图1的底部（B））。利用类似的分析，对于器件M1和M2中的低电平输出信号，可以获得布尔代数F1= F2= ABC+ A（B+ C）= CBA+ C（B+ A）= 0。
For device M1 (see the top of Figure 1 (b)), the input signals A, B, and C are injected into the source and two gate electrodes respectively, and output signal F1 is sensed at the drain terminal. Forward biasing of PN, PP and NN junctions allows for transmitting a high-level signal (A= 1) from the source terminal to the drain terminal of device M1. In this way, the dependence of the input voltage signal on current output can be transformed into corresponding Boolean algebra of A (B+ C)= 1. Reverse biasing of the NP junction enables the prevention of a low-level signal (A= 0) at the source terminal from being transmitted to the drain terminal of device M1. This corresponds to a Boolean algebra of A BC= 1. A similar Boolean algebra of F2= C (B+ A)+ C BA= 1 can be obtained for the output signal of high level in the device M2, where the input signal terminals C and A are exchanged (see the bottom of Figure 1 (b)). With the use of a similar analysis, the Boolean algebra of F1= F2= ABC+ A (B+ C)= CBA+ C (B+ A)= 0 can be obtained for the output signal of low level in the devices M1 and M2.