Dartmouth's next generation EIS system: preliminary hardware considerations
Dartmouth's next generation EIS system: preliminary hardware considerations
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DOI：
10.1088/0967-3334/22/1/304
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发表时间：
2001-02-01
影响因子：
3.2
通讯作者：
Paulsen, KD
中科院分区：
文献类型：
--
作者：
Hartov, A;Kerner, TE;Paulsen, KD
我们以前的系统覆盖0到1 MHz的频率范围。在这种新设计中，我们建议覆盖0至10 MHz的范围。更高的频率迫使我们重新考虑几个设计决策，考虑到问题的物理特性和可用电子元件的性能。在本演示文稿中，我们详细研究了设计师所面临的限制，从布线考虑到测量技术。我们还将介绍我们选择的解决方案，以克服我们发现的局限性。这些问题包括相位检测、幅度测量、系统组织和布局以及最后的系统校准。
Our previous system covered the frequency range of 0 to 1 MHz. In this new design we propose to cover the range from 0 to 10 MHz. The higher frequencies have forced us to reconsider several design decisions in view of both the physics of the problem and the performance of available electronic components. In this presentation we examine in detail the constraints faced by the designer, starting from wiring consideration to measurement techniques. We will also present the solutions we selected to overcome the limitations we discovered. The problems include phase detection, amplitude measurements, system organization and layout and finally system calibration.