Embedded interconnect and electrical isolation for high-aspect-ratio, SOI inertial instruments
Embedded interconnect and electrical isolation for high-aspect-ratio, SOI inertial instruments
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适用于高深宽比、SOI 惯性仪器的嵌入式互连和电气隔离
DOI：
10.1109/sensor.1997.613732
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发表时间：
1997
期刊：
影响因子：
--
通讯作者：
R. Howe
中科院分区：
文献类型：
--
作者：
T. Brosnihan;J. M. Bustillo;A. Pisano;R. Howe
本文介绍了一种新技术，它既能为SOI基单晶硅惯性传感器提供电隔离，又能提供嵌入式互连。该技术允许制造具有改进的灵敏度的高纵横比、平面内、电容传感器，其适于与片上电子器件集成。各种45 /spl mu/m高的MEMS器件与硅衬底和嵌入式互连的电隔离已经制造和测试。嵌入式互连和电隔离实现了真正集成的高纵横比MEMS传感器，并简化了单片双芯片方法的封装。通过将所展示的技术扩展到铝互连，仅需要两个额外的掩模来将CMOS工艺转换为完全集成的MEMS技术，而SOI起始材料的成本增加。
A new technique for providing both electrical isolation and embedded interconnect to SOI-based, single crystal silicon, inertial sensors is described. This technology allows fabrication of high-aspect-ratio, in-plane, capacitive sensors with improved sensitivity suitable for integration with on-chip electronics. Various 45 /spl mu/m-tall MEMS devices with electrical isolation from the silicon substrate and embedded interconnect have been fabricated and tested. The embedded interconnect and electrical isolation enable truly integrated high-aspect-ratio MEMS sensors, and alternatively simplifies packaging in monolithic two-chip approaches. By extending the demonstrated technique to aluminum interconnect, only two additional masks are required to convert a CMOS process into a fully integrated MEMS technology at the incremental cost of an SOI starting material.