Design for strong testability of RTL data paths to provide complete fault efficiency

Design for strong testability of RTL data paths to provide complete fault efficiency
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RTL 数据路径的强大可测试性设计可提供完整的故障效率

DOI:
10.1109/icvd.2000.812625
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发表时间:
2000
期刊:
VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design
影响因子:
--
通讯作者:
H. Fujiwara
H. Fujiwara
中科院分区:
--
文献类型:
--
作者:
H. Wada;T. Masuzawa;K. Saluja;H. Fujiwara

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在本文中,我们提出了一种用于达到100%故障效率的RTL数据路径的DFT方法。 DFT方法基于分层测试和组合ATPG工具的使用。与完整的扫描方法相比,DFT方法需要较低的硬件开销和较短的测试生成时间,并且与完整的扫描方法相比,还需要大大改善测试时间。
In this paper, we propose a DFT method for RTL data paths to achieve 100% fault efficiency. The DFT method is based on hierarchical test and usage of a combinational ATPG tool. The DFT method requires lower hardware overhead and shorter test generation time than the full scan method, and also improves test application time drastically compared with the full scan method.