FDPrior: A force-directed based parallel partitioning algorithm for three dimensional integrated circuits on GPGPU
FDPrior: A force-directed based parallel partitioning algorithm for three dimensional integrated circuits on GPGPU
复制标题
FDPrior：一种基于力导向的 GPGPU 上三维集成电路并行划分算法
DOI：
10.1109/vdat.2011.5783580
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发表时间：
2011
期刊：
影响因子：
--
通讯作者：
B. Lai
中科院分区：
文献类型：
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作者：
Wang Chen;Hsien;Tsou;B. Lai
针对3DIC的多层划分问题，提出了一种新颖的力引导并行算法FDPrior。3DIC技术不断发展的规模和多层结构使得EDA工具实现优化目标的计算成本很高。利用多核体系结构上的算法并行性成为实现可伸缩运行时的关键。FDPrior通过采用N-Body模拟方案和新的技术来降低同步开销，成功地暴露了多核GPGPU架构上的大规模并行性。其目标是在满足每一层的面积限制的同时最小化直通硅通孔(TSV)的总数。在ISPD98基准测试平台上的实验结果表明，FDPrior的性能优于传统的FM算法，平均提高了5.0倍的TSVs和高达247.3倍的运行加速比。与并行3DIC划分算法PP3D相比，FDPrior的TSVs提高了6.7倍，运行时间提高了3.3倍。
This paper proposes an innovative force-directed parallel algorithm, FDPrior, to solve the multilayer partitioning problem of 3DICs. The growing scale and multi-layered structure of the 3DIC technology make it computational expensive for EDA tools to achieve optimization goals. Exploiting the algorithmic parallelism on multi-core architectures becomes the key to attain scalable runtime. By adopting the N-body simulation scheme and novel techniques to reduce synchronization overhead, FDPrior successfully exposes the massive parallelism on the multi-core GPGPU architecture. The objective is to minimize the total number of Through Silicon Vias (TSVs) while meeting the area constraint for each layer. The experimental results on ISPD98 benchmark show that FDPrior outperforms the conventional FM algorithm by achieving in average 5.0X better TSVs and up to 247.3X runtime speedup. Compared with PP3D, a parallel 3DIC partitioning algorithm, FDPrior achieves 6.7X better TSVS with 3.3 X runtime enhancement.