NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems
NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems
复制标题
DOI：
--
复制
发表时间：
2023
期刊：
影响因子：
--
通讯作者：
Zixuan Wang;Mohammadkazem Taram;D. Moghimi;S. Swanson;D. Tullsen;Jishen Zhao
中科院分区：
文献类型：
--
作者：
Zixuan Wang;Mohammadkazem Taram;D. Moghimi;S. Swanson;D. Tullsen;Jishen Zhao
我们在本研究中研究了对非挥发性RAM（NVRAM）DIMMS的微体系侧向通道攻击和防御。 DIMM缓存结构（NVCACHE）和磨损水平的策略。为了建立这些共享硬件资源的渠道容量。通过NVRAM，当使用NVRAM用作挥发性运行时内存时，请在代码页的执行路径上进行间谍活动。是实用的和击败以前提供的防御，仅着眼于芯片硬件资源。
We study microarchitectural side-channel attacks and defenses on non-volatile RAM (NVRAM) DIMMs. In this study, we first perform reverse-engineering of NVRAMs as implemented by the Intel Optane DIMM and reveal several of its previously undocumented microarchitectural details: on-DIMM cache structures (NVCache) and wear-leveling policies. Based on these findings, we first develop cross-core and cross-VM covert channels to establish the channel capacity of these shared hardware resources. Then, we devise NVCache-based side channels under the umbrella of NVLeak. We apply NVLeak to a series of attack case studies, including compromising the privacy of databases and key-value storage backed by NVRAM and spying on the execution path of code pages when NVRAM is used as a volatile runtime memory. Our results show that side-channel attacks exploiting NVRAM are practical and defeat previously-proposed defense that only focuses on on-chip hardware resources. To fill this gap in defense, we develop system-level mitigations based on cache partitioning to prevent side-channel leakage from NVCache.