Design of compactors for signature-analyzers in built-in self-test
Design of compactors for signature-analyzers in built-in self-test
复制标题
内置自检签名分析仪压缩器的设计
DOI:
10.1109/test.2001.966618
复制
发表时间:
2001
期刊:
影响因子:
--
通讯作者:
T. Williams
中科院分区:
文献类型:
--
作者:
P. Wohl;J. Waicukauski;T. Williams
Originally developed decades ago, logic built-in self-test (BIST) evolved and is now increasingly being adopted to cope with rapid growth in design size and complexity. Compared to deterministic pattern test, logic BIST requires many more test patterns, and therefore, increased test time unless many more internal scan chains can be shifted in parallel. To match this large number of scan chains, the width of the signature analyzer would have to be enlarged, which would result in large area overhead and signature storage space. Instead, a combinational space-compactor is inserted between the scan chain outputs and the signature analyzer inputs. However, the compactor may deteriorate the ability to test and diagnose the design. This paper analyzes how compactors affect test and diagnosis and shows that compactors can be designed to actually improve the testability of certain faults, while providing full diagnosis capability. Algorithms that allow automated design of optimal compactors are presented and results are discussed.