Surge Energy Robustness of GaN Gate Injection Transistors
Surge Energy Robustness of GaN Gate Injection Transistors
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GaN 栅极注入晶体管的浪涌能量鲁棒性
DOI：
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发表时间：
2020
期刊：
影响因子：
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通讯作者：
Yuhao Zhang
中科院分区：
文献类型：
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作者：
Ruizhe Zhang;J. P. Kozak;Jingcun Liu;M. Xiao;Yuhao Zhang
功率器件的一个基本稳健性是安全承受浪涌能量的能力，这通常是在无钳位感应开关(UIS)条件下的特征。硅和碳化硅功率MOSFET可以通过雪崩来耗散浪涌能量。然而，GaN高电子迁移率晶体管(HEMT)没有雪崩能力或具有最小的雪崩能力。先前的研究报告了对GaN HEMT在UIS测试中的行为的有争议的解释。这项工作首次阐明了主流增强型GaN HEMT--GaN栅极注入晶体管(GIT)的浪涌耐受过程。与硅和碳化硅MOSFET不同的是，GaN Git通过从器件输出电容返回负载电感的共振能量传递，然后是器件反向导通和电感放电，来承受浪涌能量。在这种共振耐受过程中，几乎没有能量在器件中耗散。并对GaN Gits的失效机理进行了初步探讨。研究发现，GaN Git的浪涌能量稳健性几乎完全取决于它们的暂态过电压能力。故障分析和混合模式TCAD仿真证实，器件的故障位置与峰值过电压暂态时的峰值电场位置一致。这些结果表明，被广泛使用的JEDEC标准雪崩能量可能不能直接代表GaN HEMT的浪涌能量稳健性。雪崩能量代表了器件在不发生热失控的情况下电阻耗散能量的能力。此外，利用UIS测试产生的亚50 ns过电压脉冲，首次对混合漏极GIT的电击穿位置进行了实验验证。
An essential robustness of power devices is the capability to safely withstand surge energy, which is typically characterized in an unclamped inductive switching (UIS) condition. Si and SiC power MOSFETs can dissipate surge energy through avalanching. However, GaN high-electron-mobility-transistors (HEMTs) have no or minimal avalanche capability. Prior works reported controversial interpretations of the behaviors of GaN HEMTs in UIS tests. This work, for the first time, clarifies the surge-energy withstand process of a mainstream enhancement-mode GaN HEMT, the GaN gate injection transistor (GIT). Different from Si and SiC MOSFETs, GaN GITs are shown to withstand the surge energy through a resonant energy transfer from device output capacitance back into the load inductor, followed by the device reverse conduction and inductor discharging. Almost no energy is dissipated in the device during this resonant withstand process. The failure mechanism of GaN GITs has also been identified. It was found that the surge-energy robustness of GaN GITs is almost solely determined by their transient overvoltage capability. Failure analysis and mixed-mode TCAD simulation confirm that the device failure location is consistent with the peak electric field location at the peak overvoltage transient. These results suggest the avalanche energy, a widely used JEDEC standard for the robustness of Si and SiC power MOSFETs which represents the device capability to resistively dissipate energy without thermal runaway, may not be a parameter that can directly represent the surge energy robustness of GaN HEMTs. In addition, benefited from the sub-50 ns overvoltage pulse created by the UIS test, the electrical breakdown location of hybrid-drain GIT was experimentally verified for the firs time.