Integrated constant-fraction discriminator shaping techniques for the PHENIX lead-scintillator calorimeter
Integrated constant-fraction discriminator shaping techniques for the PHENIX lead-scintillator calorimeter
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用于 PHENIX 铅闪烁体量热计的集成恒定分数鉴别器整形技术
DOI：
10.1109/nssmic.1996.590890
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发表时间：
1996
期刊：
影响因子：
--
通讯作者：
G. Young
中科院分区：
文献类型：
--
作者：
R. G. Jackson;T. Blalock;M. L. Simpson;A. Wintenberg;G. Young
研究了几种片上恒分数线（CFD）整形方法在多通道PHENIX铅闪烁探测器中的适用性。三个CFD电路采用分布式R-C延迟线，集总元件R-C延迟线和诺林成形方法已实现在一个标准的1.2-/spl μ/m n阱CMOS工艺。为了比较，还研究了使用理想延迟线成形的CFD。在-2 V至-20 mV动态范围内，5 ns上升时间输入信号的时间游走小于/spl plusmn/175 ps、/spl plusmn/150 ps、/spl plusmn/150和/spl plusmn/185 ps，而上述四种方法的最差情况均方根时序抖动分别为85 ps、90 ps、100 ps和65 ps。测试的三种候选方法（包括部分电路）的面积要求分别为172 /spl mu//spl times/70 /spl mu/、160 /spl mu//spl times/65 /spl mu/、179 /spl mu//spl times/ 53 /spl mu/。外部延迟线电路的电路面积分数为67 /spl mu//spl乘以/65 /spl mu/。研究的每种整形方法都不消耗直流电源的功率。
The suitability of several on-chip constant-fraction discriminator (CFD) shaping methods for use in the multichannel PHENIX Lead-Scintillator detector has been investigated. Three CFD circuits utilizing a distributed R-C delay-line, a lumped-element R-C delay-line and the Nowlin shaping method have been realized in a standard 1.2-/spl mu/m n-well CMOS process. A CFD using ideal delay-line shaping was also studied for comparison. Time walk for 5 ns risetime input signals over a dynamic range of -2 V to -20 mV was less than /spl plusmn/175 ps, /spl plusmn/150 ps, /spl plusmn/150, and /spl plusmn/185 ps while worst case rms timing jitter measured 85 ps, 90 ps, 100 ps, and 65 ps, respectively, for the four methods mentioned above. Area requirements for the three candidate methods tested including the fraction circuit were 172 /spl mu//spl times/70 /spl mu/, 160 /spl mu//spl times/65 /spl mu/, 179 /spl mu//spl times/ 53 /spl mu/, respectively. The fraction circuit area for the external delay-line circuit was 67 /spl mu//spl times/65 /spl mu/. Each shaping method studied consumed no power from the dc supply.