A current-starved inverter-based differential amplifier design for ultra-low power applications

A current-starved inverter-based differential amplifier design for ultra-low power applications
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适用于超低功耗应用的电流匮乏的基于逆变器的差分放大器设计

DOI:
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发表时间:
2013
期刊:
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)
影响因子:
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通讯作者:
Ryan Selby
Ryan Selby
中科院分区:
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文献类型:
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作者:
William Wilson;Tom Chen;Ryan Selby

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随着硅器件特征尺寸的减小,如今在单个芯片上能够设计出更为复杂的电路阵列。单位面积内片上器件数量的增加,导致单位面积的功耗上升。为满足特定的功率和工作温度规范,电路设计必须注重功率效率,这在使用数百或数千个相同器件实例的系统中尤为重要。在大型阵列中,单个组件功率效率的微小提升,会因系统中该器件实例的数量而被放大。本文提出一种全差分、低功耗、基于电流饥饿型反相器的放大器拓扑结构,采用商用0.18μm工艺设计。对于超低功耗、低带宽应用,该设计在700mV电源电压下实现了46dB的直流增益和464kHz的单位增益带宽,功耗仅为145.32nW。此外还提出了更高带宽的设计,包括一款直流增益48dB、单位增益带宽2.4MHz的放大器,在900mV电源电压下工作时功耗仅为3.74μW 。
As silicon feature sizes decrease, more complex circui try arrays can now be contrived on a single die. This increase in the number of on-chip devices per unit area results in increased power dissipation per unit area. In order to meet certain power and operating temperature specifications, circuit design necessitates a focus on power efficiency, which is especially important in systems employing hundreds or thousands of instances of the same device. In large arrays, a slight increase in the power efficiency of a single component is heightened by the number of instances of the device in the system. This paper proposes a fully differential, low-power current-starving inverter-based amplifier topology designed in a commercial 0.18μm process. This design achieves 46dB DC gain and a 464 kHz uni ty gain frequency with a power consumption of only 145.32nW at 700mV power supply vol tage for ultra-low power, low bandwidth applications. Higher bandwidth designs are also proposed, including a 48dB DC gain, 2.4 MHz unity-gain frequency amplifier operating at 900mV wi th only 3.74μW power consumption.