ASAP: A Speculative Approach to Persistence
ASAP: A Speculative Approach to Persistence
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DOI：
10.1109/hpca53966.2022.00070
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发表时间：
2022-04
期刊：
影响因子：
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通讯作者：
Sujay Yadalam;Nisarg Shah;Xiangyao Yu;M. Swift
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作者：
Sujay Yadalam;Nisarg Shah;Xiangyao Yu;M. Swift
持久内存支持一类具有持久内存数据结构的新应用程序。这些应用程序的可恢复性对写入持久性内存的顺序施加了约束。但是，现代系统中的缓存层次结构和内存控制器可能会对写入持久内存进行重新排序。因此，程序员必须使用昂贵的flush和fence指令，使处理器停止执行这种排序。虽然先前的努力避免了长延迟flush指令的延迟，但这些设计在具有许多内核和多个内存控制器的大型系统中表现不佳。我们提出了一种架构模型ASAP，在该模型中，硬件采用乐观的方法，通过急切地持久化数据，从而避免任何排序停顿，并有效地利用系统总带宽。ASAP通过允许乱序持久化（假定所有写最终都将持久化）来避免延迟。为了保证正确性，ASAP将恢复信息保存在内存控制器中，用于在发生崩溃时撤销推测性写内存的影响。在大量具有代表性的工作负载中，ASAP的性能比当前的Intel系统平均提高了2.3，比理想系统的性能提高了3.9%。
Persistent memory enables a new class of applications that have persistent in-memory data structures. Recoverability of these applications imposes constraints on the ordering of writes to persistent memory. But, the cache hierarchy and memory controllers in modern systems may reorder writes to persistent memory. Therefore, programmers have to use expensive flush and fence instructions that stall the processor to enforce such ordering. While prior efforts circumvent stalling on long latency flush instructions, these designs under-perform in large-scale systems with many cores and multiple memory controllers.We propose ASAP, an architectural model in which the hardware takes an optimistic approach by persisting data eagerly, thereby avoiding any ordering stalls and utilizing the total system bandwidth efficiently. ASAP avoids stalling by allowing writes to be persisted out-of-order, speculating that all writes will eventually be persisted. For correctness, ASAP saves recovery information in the memory controllers which is used to undo the effects of speculative writes to memory in the event of a crash.Over a large number of representative workloads, ASAP improves performance over current Intel systems by 2.3 on average and performs within 3.9% of an ideal system.