Yield improvement using configurable analogue transistors

Yield improvement using configurable analogue transistors
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使用可配置模拟晶体管提高产量

DOI:
10.1049/el:20081409
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发表时间:
2008
影响因子:
1.1
通讯作者:
Wilson P
Wilson P
中科院分区:
工程技术4区
文献类型:
--
作者:
Wilson P

文献摘要

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持续的工艺扩展给当今的设计人员带来了重大的成品率和可靠性挑战。抗干扰电路特别容易受到较差变化的影响,这推动了该领域对新的产量弹性技术的需求。描述了一种新的可配置的模拟晶体管结构和支持方法,其有助于在制造后阶段进行变化补偿。该方法已被证明显着的产量提高,并可应用于任何模拟电路。
Continued process scaling has led to significant yield and reliability challenges for today’s designers. Analogue circuits are particularly susceptible to poor variation, driving the need for new yield resilient techniques in this area. A new configurable analogue transistor structure and supporting methodology that facilitates variation compensation at the post-manufacture stage is described. The approach has demonstrated significant yield improvements and can be applied to any analogue circuit.