6.7 A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS

6.7 A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS
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DOI：
10.1109/isscc.2019.8662361
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发表时间：
2019-02
期刊：
2019 IEEE International Solid- State Circuits Conference - (ISSCC)
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通讯作者：
Pen-Jui Peng;Yan-Ting Chen;Sheng-Tsung Lai;Chao-Hsuan Chen;Hsiang-En Huang;T. Shih
Pen-Jui Peng;Yan-Ting Chen;Sheng-Tsung Lai;Chao-Hsuan Chen;Hsiang-En Huang;T. Shih
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其他
文献类型：
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作者：
Pen-Jui Peng;Yan-Ting Chen;Sheng-Tsung Lai;Chao-Hsuan Chen;Hsiang-En Huang;T. Shih

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有线通信的不断发展促使发射机以更高的速度工作。400 GbE的应用也推动发射机设计为单通道112 Gb/s [1-2]。然而，先进工艺的使用几乎没有降低成本。采用两步FFE和自动相位对准技术，在40 nm CMOS工艺上实现了112 Gb/s PAM-4电压模式发射机，提高了输出带宽，降低了功耗。该器件在28 GHz频率、5.5dB损耗和3.89 pJ/B效率下提供高质量眼图。
The continuous development of wireline communication encourages transmitters to operate at higher speeds. The applications of 400GbE also push the transmitter to be designed at 112Gb/s for a single lane [1–2]. However, the use of advanced processes $(\lt16$ nm) hardly reduces the costs. This paper presents a 112Gb/s PAM-4 voltage-mode transmitter fabricated in 40nm CMOS by using the proposed two-step FFE and the automatic phase alignment techniques, improving the output bandwidth as well as the power dissipation. It delivers high-quality eye diagrams under 5.5dB loss at 28GHz with 3.89pJ/b efficiency.