Hierarchical reversible logic synthesis using LUTs

Hierarchical reversible logic synthesis using LUTs
复制标题

使用 LUT 的分层可逆逻辑综合

DOI:
10.1145/3061639.3062261
复制
发表时间:
2017
期刊:
2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)
影响因子:
--
通讯作者:
G. Micheli
G. Micheli
中科院分区:
--
文献类型:
--
作者:
Mathias Soeken;M. Rötteler;N. Wiebe;G. Micheli

文献摘要

被引文献

相似文献

当今量子计算机物理实现的快速发展需要可扩展的综合方法,以便将实际的逻辑设计映射到量子架构。我们提出了一种基于k-LUT网络的量子计算综合算法,该算法可以从Verilog网表中使用最先进的和现成的映射算法导出。我们证明了我们的方法的有效性,在自动合成几个浮点网络的两倍精度。由于许多量子算法以科学模拟应用为目标,它们可以充分利用浮点运算组件。但由于缺乏对这些组件的量子电路描述,不可能为这些算法找到一个现实的成本估计。我们的综合基准提供了成本估计,允许量子算法设计者为大量量子算法提供第一个完整的成本估计。这是朝着理解哪些量子算法将在第一代量子计算机中实用的目标迈出的重要一步。
Today's rapid advances in the physical implementation of quantum computers demand for scalable synthesis methods in order to map practical logic designs to quantum architectures. We present a synthesis algorithm for quantum computing based on k-LUT networks, which can be derived from Verilog netlists using state-of-the-art and of-the-shelf mapping algorithms. We demonstrate the effectiveness of our method in automatically synthesizing several floating point networks up to double precision. As many quantum algorithms target scientific simulation applications, they can make rich use of floating point arithmetic components. But due to the lack of quantum circuit descriptions for those components, it is not possible to find a realistic cost estimation for the algorithms. Our synthesized benchmarks provide cost estimates that allow quantum algorithm designers to provide the first complete cost estimates for a host of quantum algorithms. This is an essential step towards the goal of understanding which quantum algorithms will be practical in the first generations of quantum computers.