An architecture of highly parallel computer AP 1000
An architecture of highly parallel computer AP 1000
复制标题
高度并行计算机AP 1000的架构
DOI:
10.1109/pacrim.1991.160669
复制
发表时间:
1991
期刊:
影响因子:
--
通讯作者:
Sadayuki Kato
中科院分区:
文献类型:
--
作者:
H. Ishihata;T. Horie;S. Inano;Toshiyuki Shimizu;Sadayuki Kato
A highly parallel computer with distributed memory called the AP1000 has been developed. The system consists of 64 and 1024 processing elements and three independent networks called the torus network (T-net), broadcast network (B-net), and synchronization network (S-net). The design goal for the AP1000 is to attain low-latency, high-throughput communication. To reduce the overall communication latency, a message controller and a new routing scheme on the T-net have been developed. The design concepts, architecture, and some results from performance tests for the AP1000 are presented.<<ETX>>