Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application
Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application
复制标题
FPGA 上的可重新配置和硬连线 ORB 引擎，通过 Java 到 HDL 合成器实现实时应用
DOI：
10.1145/2641361.2641374
复制
发表时间：
2014
期刊：
影响因子：
--
通讯作者：
Takanobu Baba
中科院分区：
文献类型：
--
作者：
Takeshi Ohkawa;Daichi Uetake;Takashi Yokota;Kanemitsu Ootsu;Takanobu Baba
提出了一种网络化FPGA系统设计平台“ORB Engine”，为软件和硬连线ip组成的FPGA系统增加可控性和设计效率。开发人员可以在FPGA中定义电路IP的面向对象接口，并使用Java实现控制序列部分。FPGA中的电路IP可以用c++、Java、Python、Ruby等多种编程语言通过面向对象的接口进行处理。针对ORB（对象请求代理）协议处理的特定于应用程序的高效电路是在事实上的标准CORBA（公共对象请求代理体系结构）中使用JavaRock Java-to- hdl合成器从易于处理的Java代码合成的。测量结果显示，UDP/IP数据包的输入/输出延迟低至200us，并且具有无波动的延迟性能，这是实时应用所需要的。
A platform for networked FPGA system design, which is named "ORB Engine", is proposed to add more controllability and design productivity on FPGA-based systems composed of software and hardwired IPs. A developer can define an object-oriented interface for the circuit IP in FPGA, and implement the control sequence part using Java. The circuit IP in FPGA can be handled through object-oriented interface from variety of programing languages like C++, Java, Python, Ruby and so on. Application specific and high-efficiency circuit for ORB (Object Request Broker) protocol processing is synthesized from easy-handling Java code using JavaRock Java-to-HDL synthesizer within the de-facto standard CORBA (Common Object Request Broker Architecture). The measurement result shows a very low latency as low as 200us of UDP/IP packet in/out and exhibits a fluctuation free delay performance, which is desirable for real-time applications.