Gate stack technology for nanoscale devices

Gate stack technology for nanoscale devices
复制标题

DOI:
10.1109/nmdc.2006.4388841
复制
发表时间:
2006-06
期刊:
2006 IEEE Nanotechnology Materials and Devices Conference
影响因子:
--
通讯作者:
B. Lee;P. Kirsch;Seung–Hoon Song;R. Choi;R. Jammy
B. Lee;P. Kirsch;Seung–Hoon Song;R. Choi;R. Jammy
中科院分区:
其他
文献类型:
--
作者:
B. Lee;P. Kirsch;Seung–Hoon Song;R. Choi;R. Jammy

文献摘要

被引文献

相似文献

本文回顾了硅器件栅极堆栈技术的历史演变,并对纳米级CMOS器件和非硅基器件的栅极堆栈技术面临的挑战提供了见解。
The historical evolution of gate stack technology for silicon devices is reviewed to provide insight on the challenges in this technology for scaled nanoscale CMOS devices and non-Si-based devices.