Representative Critical Reliability Paths for low-cost and accurate on-chip aging evaluation

Representative Critical Reliability Paths for low-cost and accurate on-chip aging evaluation
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用于低成本和准确片上老化评估的代表性关键可靠性路径

DOI:
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发表时间:
2012
期刊:
2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
影响因子:
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通讯作者:
M. Tehranipoor
M. Tehranipoor
中科院分区:
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文献类型:
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作者:
Shuo Wang;Jifeng Chen;M. Tehranipoor

文献摘要

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晶体管的老化会降低电路性能,并可能导致现场功能故障。这已经成为一个主要的可靠性问题,特别是当技术进一步扩展到45纳米及以下时。因此,有必要设计芯片上的结构,可以提供准确的老化评估没有性能损失。在本文中,我们提出了一种新的方法来准确地评估该领域的老化。代表性关键可靠性路径(RCRP-s)被合成为一个独立的电路,以代表关键可靠性路径的老化,这些路径被定义为由于老化而可能在某个时间点成为关键的路径。通过监控RCRP,可以有效和准确地评估关键可靠性路径的老化,而不会影响芯片的正常运行。老化评估结果可用于指导片上性能校准,以确保寿命可靠性。仿真结果验证了该结构的有效性。
Aging of transistors degrades circuit performance and can potentially lead to functional failure in the field. This has become a major reliability concern especially when technology further scales to 45 nm and below. It is thus necessary to design on-chip structures that can provide accurate aging evaluation with no performance penalty. In this paper, we propose a novel methodology to accurately evaluate aging in the field. Representative Critical Reliability Paths (RCRP-s) are synthesized as a stand-alone circuit to represent the aging of critical reliability paths, which are defined as paths that can potentially become critical at some point in time due to aging. By monitoring the RCRPs, aging of the critical reliability paths can be efficiently and accurately evaluated with no impact on the normal operation of the chip. The aging evaluation results can then be exploited to guide on-chip performance calibration to ensure lifetime reliability. Simulation results demonstrate the efficiency of the proposed structure.