IP Reuse Hardening via Embedded Sugar Assertions
IP Reuse Hardening via Embedded Sugar Assertions
复制标题
通过嵌入式 Sugar 断言进行 IP 重用强化
DOI：
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发表时间：
2002
期刊：
影响因子：
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通讯作者：
G. Martin
中科院分区：
文献类型：
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作者：
E. Marschner;Bernard Deadman;G. Martin
复杂芯片的设计需要可重复使用的IP块的获取和集成。IP块的有效重用需要记录设计人员对该块的理解，特别是其接口要求和有关其内部操作的任何假设。嵌入在设计中的断言可以捕获这些知识，以便快速捕获IP配置或使用中的任何错误。Sugar 2.0是Accellera形式验证技术委员会（1）正在开发的一种即将到来的标准属性规范语言，它提供了一种表达这种断言的强大方法。1.随着设计复杂性的不断增加和市场窗口的不断缩小，重复使用已成为强制性的。快速创建新的、越来越复杂的设计要求每个设计的重要部分必须从其他来源获取并集成以实现最终目标。知识产权（IP）或虚拟组件（VC）的重用，无论是由同一家公司开发还是从IP供应商购买，都已成为片上系统（SoC）开发的现实。但IP重用是一项挑战。知识产权必须明确地设计为可重用的，它必须与所有必要的信息打包，以实现其有效的重用，包括配置，合成，特别是验证信息。“软”IP可能被消费者进一步修改的事实使得验证更具挑战性。当前的重用指南，如（4）和（6），开始反映这些新的重用需求。为重复使用而设计的IP在所有意义上都必须是模块化的。它必须执行定义良好的功能，并具有定义良好的接口。关于其功能及其接口的知识必须与IP一起捕获，以便IP可以用于在时间或空间上远离设计团队的芯片的设计中，
design of complex chips requires acquisition and integration of reusable IP blocks. Effective reuse of an IP block requires documenting the designer's understanding of the block, particularly its interface requirements and any assumptions about its internal operation. Assertions embedded in the design can capture this knowledge so that any errors in the configuration or use of the IP will be caught quickly. Sugar 2.0, an upcoming standard property specification language being developed by the Accellera Formal Verification Technical Committee (1), provides a powerful means of expressing such assertions. 1. INTRODUCTION reuse has become mandatory as design complexity continues to increase and market windows continue to shrink. Rapid creation of new, ever more complex designs demands that significant portions of each design must be acquired from other sources and integrated to achieve the end goal. Reuse of intellectual property (IP), or virtual components (VC), whether developed by the same company or purchased from an IP supplier, has become a fact of life for System on Chip (SoC) development. But IP reuse is challenging. IP must be explicitly designed for reuse, and it must be packaged with all the information necessary to enable its effective reuse, including configuration, synthesis, and especially verification information. The fact that "soft" IP may be further modified by the consumer makes verification even more challenging. Current guidelines for reuse, such as (4) and (6), are starting to reflect these new reuse requirements. IP designed for reuse must be modular in all senses. It must perform a well-defined function, with well-defined interfaces. Knowledge about its function and its interfaces must be captured with the IP, so that the IP can be used in the design of chips that are far removed in time or space from the design team that