A Cascaded Self-Similar Rat-Race Hybrid Coupler Architecture and its Compact Fully Integrated Ka-band Implementation

A Cascaded Self-Similar Rat-Race Hybrid Coupler Architecture and its Compact Fully Integrated Ka-band Implementation
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级联自相似老鼠竞争混合耦合器架构及其紧凑的全集成Ka波段实现

DOI:
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发表时间:
2018
期刊:
Intelligent Memory Systems
影响因子:
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通讯作者:
Hua Wang
Hua Wang
中科院分区:
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文献类型:
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作者:
E. Garay;Min;Hua Wang

文献摘要

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本文提出了一种级联的鼠笼耦合器架构,执行宽带同相和差分信号产生,同时保持一个非常紧凑的无源结构尺寸。我们提出的级联耦合器可以支持24,27,37,39 GHz的多频段多标准5G通信系统。我们已经证明,级联拓扑结构成功地抑制了输出幅度失配,并保持差分输出相位,使耦合器的带宽大幅扩展。采用GlobalFoundries 45 nm CMOS SOI工艺实现了一个22.6-43.4 GHz二阶级联环形耦合器。根据我们的测量结果,级联的rat-race耦合器设计实现了小于5°的相位误差,小于1dB的幅度失配,平均插入损耗仅为2.5dB,整个Ka波段的输入匹配优于− 10 dB。
This paper presents a cascaded rat-race coupler architecture that performs broadband in-phase and differential signal generation while maintaining a very compact passive structure size. Our proposed cascaded coupler can support multiband multi-standard 5G communication systems at 24, 27, 37, 39GHz. We have demonstrated that the cascade topology successfully suppresses the output amplitude mismatch and maintains differential output phases, enabling substantial coupler bandwidth extension. A proof-of-concept 22.6-43.4 GHz 2nd-order cascaded rat-race coupler is implemented in the GlobalFoundries 45nm CMOS SOI process. Based on our measurement results, the cascaded rat-race coupler design achieves a less than 5° phase error, less-than 1dB magnitude mismatch, an average insertion loss of only 2.5dB, and better-than −10dB input matching across the entire Ka-band.