Transfer-Free Synthesis of Atomically Precise Graphene Nanoribbons on Insulating Substrates
Transfer-Free Synthesis of Atomically Precise Graphene Nanoribbons on Insulating Substrates
复制标题
绝缘基底上原子级精确石墨烯纳米带的无转移合成
DOI：
10.1021/acsnano.0c07591
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发表时间：
2021
期刊：
影响因子：
17.1
通讯作者：
Bokor, Jeffrey
中科院分区：
文献类型：
--
作者：
Mutlu, Zafer;Llinas, Juan Pablo;Jacobse, Peter H.;Piskun, Ilya;Blackwell, Raymond;Crommie, Michael F.;Fischer, Felix R.;Bokor, Jeffrey
石墨烯纳米带（GNR）的合理自下而上合成提供了对宽度和边缘的原子级精确控制，从而产生了广泛的电子特性，有望用于场效应晶体管（FET）等电子设备。由于自下而上的合成通常发生在催化金属表面上，因此将 GNR 集成到此类设备中需要将其转移到绝缘基板上，这仍然是基于 GNR 的电子产品发展的瓶颈之一。在此，我们报告了一种在绝缘体上无转移放置 GNR 的方法。这涉及到在沉积在绝缘层上的金膜上生长 GNR，然后对金进行温和的湿法蚀刻，从而使纳米带沉积在下面的绝缘基板上。扫描隧道显微镜和拉曼光谱证实，原子级精确的高密度 GNR 均匀生长在沉积到 SiO2/Si 基板上的金膜上，并且在蚀刻过程后保持结构完整。我们还展示了使用此工艺的超短沟道 GNR FET 的无转移制造。目前工作的一个非常重要的方面是该方法可以很好地扩展到 12 英寸晶圆，这对于以前的技术来说是极其困难的。因此，我们在这里的工作代表了将 GNR 大规模集成到电子设备中的重要一步。
The rational bottom-up synthesis of graphene nanoribbons (GNRs) provides atomically precise control of widths and edges that give rise to a wide range of electronic properties promising for electronic devices such as field-effect transistors (FETs). Since the bottom-up synthesis commonly takes place on catalytic metallic surfaces, the integration of GNRs into such devices requires their transfer onto insulating substrates, which remains one of the bottlenecks in the development of GNR-based electronics. Herein, we report on a method for the transfer-free placement of GNRs on insulators. This involves growing GNRs on a gold film deposited onto an insulating layer followed by gentle wet etching of the gold, which leaves the nanoribbons to settle in place on the underlying insulating substrate. Scanning tunneling microscopy and Raman spectroscopy confirm that atomically precise GNRs of high density uniformly grow on the gold films deposited onto SiO2/Si substrates and remain structurally intact after the etching process. We have also demonstrated transfer-free fabrication of ultrashort channel GNR FETs using this process. A very important aspect of the present work is that the method can scale up well to 12 in. wafers, which is extremely difficult for previous techniques. Our work here thus represents an important step toward large-scale integration of GNRs into electronic devices.