An ON-OFF orientation selective address event representation image transceiver chip

An ON-OFF orientation selective address event representation image transceiver chip
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一种ON-OFF定向选择性地址事件表示图像收发芯片

DOI:
10.1109/tcsi.2003.822551
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发表时间:
2004
期刊:
IEEE Transactions on Circuits and Systems I: Regular Papers
影响因子:
--
通讯作者:
K. Boahen
K. Boahen
中科院分区:
--
文献类型:
--
作者:
Thomas Y. W. Choi;Bertram E. Shi;K. Boahen

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本文描述了四层细胞神经网络架构的电子实现,该架构实现了视觉皮层神经元功能模型的两个组成部分:线性方向选择性滤波和半波整流。单独的 ON 和 OFF 层代表两相正交 Gabor 型滤波器的正输出和负输出,其方向和空间频率调谐可通过电子方式调节。为了使多芯片网络的构建能够并行提取不同的方向,该芯片包括一个地址事件表示 (AER) 收发器,该收发器接受并生成被速率编码为尖峰序列的二维图像。它还包括有助于点对点信号扇入和扇出的路由电路。我们展示了 32/spl 次/64 像素原型的测量结果,该原型是在 3.84 x 2.54 mm 芯片上采用 TSMC0.25-/spl mu/m 工艺制造的。静态功耗为 3 mW,主要由 AER 总线上的尖峰活动决定。稳定时间约为几毫秒。与实现相同滤波器的双层网络相比,该网络可实现更对称的电路设计,并具有更低的静态功耗,尽管代价是晶体管数量增加了一倍。
This paper describes the electronic implementation of a four-layer cellular neural network architecture implementing two components of a functional model of neurons in the visual cortex: linear orientation selective filtering and half wave rectification. Separate ON and OFF layers represent the positive and negative outputs of two-phase quadrature Gabor-type filters, whose orientation and spatial-frequency tunings are electronically adjustable. To enable the construction of a multichip network to extract different orientations in parallel, the chip includes an address event representation (AER) transceiver that accepts and produces two-dimensional images that are rate encoded as spike trains. It also includes routing circuitry that facilitates point-to-point signal fan in and fan out. We present measured results from a 32/spl times/64 pixel prototype, which was fabricated in the TSMC0.25-/spl mu/m process on a 3.84 by 2.54 mm die. Quiescent power dissipation is 3 mW and is determined primarily by the spike activity on the AER bus. Settling times are on the order of a few milliseconds. In comparison with a two-layer network implementing the same filters, this network results in a more symmetric circuit design with lower quiescent power dissipation, albeit at the expense of twice as many transistors.
DOI: 10.1152/jn.2002.88.1.455
发表时间: 2002-07-01
影响因子: 2.5
作者:
Ringach, DL
通讯作者: Ringach, DL