Study of statistical variability in nanoscale transistors introduced by LER, RDF and MGG
Study of statistical variability in nanoscale transistors introduced by LER, RDF and MGG
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LER、RDF 和 MGG 引入的纳米级晶体管统计变异性研究
DOI：
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发表时间：
2013
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通讯作者：
K. Kalna
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文献类型：
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作者：
G. Indalecio;A. García;M. Aldegunde;K. Kalna
开发了一个实现了密度梯度量子修正的三维漂移扩散器件模拟器，用于运行数百次模拟来收集非平面晶体管的可变性特性。我们包括了线边缘粗糙度(LER)、随机掺杂(RD)和金属栅粒度(MGG)引起的变化，它们被认为是器件特性变化的最重要来源。然后利用该模拟器研究了25 nm栅长的SiSOI FinFET中由于LER和MGG引起的阈值电压变化。我们发现，LER引起的阈值变化量的平均值为344.5 mV，σ为4.7mV，而MGG的平均值为349.9 mV，σ为13.3mV，比LER的变化量大一个数量级。
A 3D drift-diffusion device simulator with implemented density-gradient quantum corrections is developed to run hundreds of simulations to gather variability characteristics in non-planar transistors. We have included the line edge roughness (LER), random dopants (RD), and metal gate granularity (MGG) induced variabilities, which are considered to be the most important sources of variability in device characteristics. The simulator is then applied to study a threshold voltage variability in a 25 nm gate length Si SOI FinFET due to LER and MGG. We found that the LER induced threshold variability has a mean value of 344.5 mV and σ of 4.7 mV while the MGG induced has a mean value of 349.9 mV and σ of 13.3 mV an order of magnitude greater than the LER variability.