Lyra: A Cross-Platform Language and Compiler for Data Plane Programming on Heterogeneous ASICs

Lyra: A Cross-Platform Language and Compiler for Data Plane Programming on Heterogeneous ASICs
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DOI:
10.1145/3387514.3405879
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发表时间:
2020-07
期刊:
Proceedings of the Annual conference of the ACM Special Interest Group on Data Communication on the applications, technologies, architectures, and protocols for computer communication
影响因子:
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通讯作者:
Jiaqi Gao;Ennan Zhai;H. Liu;Rui Miao;Yu Zhou;Bingchuan Tian;Chen Sun;Dennis Cai;Ming Zhang;Minlan Yu
Jiaqi Gao;Ennan Zhai;H. Liu;Rui Miao;Yu Zhou;Bingchuan Tian;Chen Sun;Dennis Cai;Ming Zhang;Minlan Yu
中科院分区:
其他
文献类型:
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作者:
Jiaqi Gao;Ennan Zhai;H. Liu;Rui Miao;Yu Zhou;Bingchuan Tian;Chen Sun;Dennis Cai;Ming Zhang;Minlan Yu

文献摘要

相似文献

随着主流交换ASIC供应商在其新推出的产品(如Broadcom的Trident-4、Intel/Barefoot的Tofino和Cisco的Silicon One)中实现可编程性,可编程数据平面一直在向数据中心部署。然而,当前的数据平面程序是以低级、芯片专用语言(例如,P4和NPL),并因此紧密耦合到芯片专用架构。因此,在生产网络中开发、维护和复合数据平面程序是艰巨的并且容易出错。本文介绍了Lyra,第一个跨平台的高级语言和编译系统,帮助程序员有效地编程数据平面。Lyra提供了一个大管道抽象,允许程序员使用简单的语句来表达他们的意图,而无需费力地照顾硬件中的细节; Lyra还提出了一套合成和优化技术,可以自动将这个“大管道”程序编译成多个可运行的芯片特定代码,这些代码可以直接在目标网络的单个可编程交换机上启动。我们构建并评估了Lyra。Lyra不仅生成可运行的真实世界程序(P4和NPL),而且比人类编写的程序使用的硬件资源少87.5%,代码行数少78%。
Programmable data plane has been moving towards deployments in data centers as mainstream vendors of switching ASICs enable programmability in their newly launched products, such as Broadcom's Trident-4, Intel/Barefoot's Tofino, and Cisco's Silicon One. However, current data plane programs are written in low-level, chip-specific languages (e.g., P4 and NPL) and thus tightly coupled to the chip-specific architecture. As a result, it is arduous and error-prone to develop, maintain, and composite data plane programs in production networks. This paper presents Lyra, the first cross-platform, high-level language & compiler system that aids the programmers in programming data planes efficiently. Lyra offers a one-big-pipeline abstraction that allows programmers to use simple statements to express their intent, without laboriously taking care of the details in hardware; Lyra also proposes a set of synthesis and optimization techniques to automatically compile this "big-pipeline" program into multiple pieces of runnable chip-specific code that can be launched directly on the individual programmable switches of the target network. We built and evaluated Lyra. Lyra not only generates runnable real-world programs (in both P4 and NPL), but also uses up to 87.5% fewer hardware resources and up to 78% fewer lines of code than human-written programs.