DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters
DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters
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DOI：
10.1145/3508352.3549427
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发表时间：
2022-10
期刊：
影响因子：
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通讯作者：
Zhiyao Xie;Shiyu Li;Mingyuan Ma;Chen-Chia Chang;Jingyu Pan;Yiran Chen;Jiangkun Hu
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作者：
Zhiyao Xie;Shiyu Li;Mingyuan Ma;Chen-Chia Chang;Jingyu Pan;Yiran Chen;Jiangkun Hu
准确高效的片上功耗建模对于运行时功耗、能源和电压管理至关重要。这种功率监控可以通过设计片上功率计（OPM）并将其集成到目标设计中来实现。在这项工作中，我们提出了一个新的方法命名为深度自动开发非常有效的OPM解决方案，为给定的设计。DEEP从RTL信号中的所有单个位中选择OPM输入。这种比特级选择提供了前所未有的大量的候选输入，并支持较低的硬件成本，与信号级选择在以前的作品。此外，DEEP提出了一种功能强大的两步OPM输入选择方法，它支持报告总功率和主要设计组件的功率。在商用微处理器上的实验表明，DEEP的OPM解决方案在每周期功率预测中实现了相关性R > 0.97，并且在硬件上具有前所未有的低面积开销，即，<微处理器布局的0.1%。与最先进的解决方案相比，这将OPM硬件成本降低了4 - 6倍。
Accurate and efficient on-chip power modeling is crucial to runtime power, energy, and voltage management. Such power monitoring can be achieved by designing and integrating on-chip power meters (OPMs) into the target design. In this work, we propose a new method named DEEP to automatically develop extremely efficient OPM solutions for a given design. DEEP selects OPM inputs from all individual bits in RTL signals. Such bit-level selection provides an unprecedentedly large number ofinput candidates and supports lower hardware cost, compared with signal-level selection in prior works. In addition, DEEP proposes a powerful two-step OPM input selection method, and it supports reporting both total power and the power of major design components. Experiments on a commercial microprocessor demonstrate that DEEP's OPM solution achieves correlation R > 0.97 in per-cycle power prediction with an unprecedented low area overhead on hardware, i.e., < 0.1% of the microprocessor layout. This reduces the OPM hardware cost by 4 – 6× compared with the state-of-the-art solution.