A modular simulation framework for spatial and temporal task mapping onto multi-processor SoC platforms
A modular simulation framework for spatial and temporal task mapping onto multi-processor SoC platforms
复制标题
用于将空间和时间任务映射到多处理器 SoC 平台的模块化仿真框架
DOI：
10.1109/date.2005.21
复制
发表时间：
2005
期刊：
影响因子：
--
通讯作者：
B. Vanthournout
中科院分区：
文献类型：
--
作者：
T. Kempf;Malte Doerper;R. Leupers;G. Ascheid;H. Meyr;Tim Kogel;B. Vanthournout
异构型多处理器SoC(MP-SoC)平台具有优化苛刻的信号处理和网络应用所施加的相互冲突的性能、灵活性和能效约束的潜力。然而，为了利用可用的处理和通信资源，应用程序任务到平台资源的最佳映射是至关重要的。我们提出了一个基于SystemC的仿真框架，它能够通过可执行的性能模型对应用程序到平台的映射进行定量评估。该方法的关键元素是一个可配置的事件驱动的虚拟处理单元，用于捕获多处理器/多线程MP-SoC平台的时序行为。该框架的特点是性能模型的基于XML的声明性构造机制，以显著加快大型设计空间中的导航速度。通过一个用于网络应用的商用MP-SoC平台的案例研究，展示了所提出的框架在设计空间探索方面的能力。聚焦于建筑映射的应用，我们介绍的框架突出了优化高效设计空间探索环境的潜力。
Heterogeneous multi-processor SoC (MP-SoC) platforms bear the potential to optimize conflicting performance, flexibility and energy efficiency constraints as imposed by demanding signal processing and networking applications. However, in order to take advantage of the available processing and communication resources, an optimal mapping of the application tasks on to the platform resources is of crucial importance. We propose a SystemC-based simulation framework, which enables the quantitative evaluation of application-to-platform mappings by means of an executable performance model. The key element of our approach is a configurable event-driven virtual processing unit to capture the timing behavior of multi-processor/multi-threaded MP-SoC platforms. The framework features an XML-based declarative construction mechanism of the performance model to accelerate navigation significantly in large design spaces. The capabilities of the proposed framework in terms of design space exploration is presented by a case study of a commercially available MP-SoC platform for networking applications. Focussing on the application to architecture mapping, our introduced framework highlights the potential for optimization of an efficient design space exploration environment.