A scalable Verilog-A modeling method for ESD protection devices
A scalable Verilog-A modeling method for ESD protection devices
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发表时间：
2010-11
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通讯作者：
Weiying Li;Yu Tian;Linpeng Wei;C. Gill;Wei Mao;Chuanzheng Wang
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作者：
Weiying Li;Yu Tian;Linpeng Wei;C. Gill;Wei Mao;Chuanzheng Wang
利用行为语言Verilog-A，提出了一种新颖实用的ESD保护器件建模方法。该方法与模拟器无关，易于实现，可扩展到不同类型的ESD保护器件。ESD器件的触发电压、保持电压和导通电阻随器件尺寸可扩展，因此该模型适用于预测ESD仿真。通过齐纳触发双极器件和NMOS器件模型与传输线脉冲测量之间良好的硅相关性，验证了该方法的有效性。这些模型适用于电路级ESD仿真，不会遇到收敛问题。
A novel and practical modeling method is presented for ESD protection devices, using behavior language Verilog-A. This method is simulator-independent, easy-to-implement, and extendable to different types of ESD protection devices. The triggering voltage, holding voltage, and turn-on resistance of ESD devices are scalable with device dimensions so that the models are suitable for predictive ESD simulations. This method has been validated by the good silicon correlation between the models of zener-triggered bipolar devices and NMOS devices and transmission line pulsing measurement. These models are suitable for circuit level ESD simulations without encountering convergence problems.