A 0.2-mW 2-Mb/s Digital Transceiver Based on Wideband Signaling for Human Body Communications
A 0.2-mW 2-Mb/s Digital Transceiver Based on Wideband Signaling for Human Body Communications
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DOI：
10.1109/jssc.2007.903080
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发表时间：
2007-08
影响因子：
5.4
通讯作者：
Seong-Jun Song;Namjun Cho;H. Yoo
中科院分区：
文献类型：
--
作者：
Seong-Jun Song;Namjun Cho;H. Yoo
提出了一种适用于人体区域网络的低功耗宽带信号数字收发器。低功耗高速人体通信（HBC）采用基于WBS的数字收发芯片，采用阻抗为50 ω的电极直接耦合接口（DCI）。信道调查与DCI确定了10千赫至100兆赫的最佳信道带宽。WBS数字收发器采用直接数字发送器和全数字时钟和数据恢复（CDR）电路。为了进一步降低功耗，所提出的CDR电路采用了低压数字控制振荡器和二次采样技术。采用0.25 μ m标准CMOS技术的WBS数字收发器芯片具有2 mb /s的数据速率，误码率为1.1 × 10-7，由1.5 v电池产生的1 v电源仅耗散0.2 mW。
This paper presents a low-power wideband signaling (WBS) digital transceiver for data transmission through a human body for body area network applications. The low-power and highspeed human body communication (HBC) utilizes a digital transceiver chip based on WBS and adopts a direct-coupled interface (DCI) which uses an electrode of 50-Omega impedance. The channel investigation with the DCI identities an optimum channel bandwidth of 10 kHz to 100 MHz. The WBS digital transceiver exploits a direct digital transmitter and an all-digital clock and data recovery (CDR) circuit. To further reduce power consumption, the proposed CDR circuit incorporates a low-voltage digitally-controlled oscillator and a quadratic sampling technique. The WBS digital transceiver chip with a 0.25-mum standard CMOS technology has 2-Mb/s data rate at a bit error rate of 1.1 times 10-7, dissipating only 0.2 mW from a 1-V supply generated by a 1.5-V battery.