Low-Temperature Materials and Thin Film Transistors for Flexible Electronics
Low-Temperature Materials and Thin Film Transistors for Flexible Electronics
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DOI：
10.1109/jproc.2005.851497
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发表时间：
2005-07
影响因子：
20.6
通讯作者：
A. Sazonov;D. Striakhilev;Czang-Ho Lee;A. Nathan
中科院分区：
文献类型：
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作者：
A. Sazonov;D. Striakhilev;Czang-Ho Lee;A. Nathan
本文讨论了硅基薄膜半导体和硅基半导体的低温沉积工艺和电子特性，以实现在塑料基板上制造机械柔性电子器件。使用现有的工业等离子体沉积设备在低至75/spl deg/C和120/spl deg/C的工艺温度下制备器件质量的非晶氢化硅（a-Si：H）、纳米晶硅（nc-Si）和非晶氮化硅（a-SiN/sub x/）膜和薄膜晶体管（TFT）。在120/spl deg/C下制造的a-Si：H TFT表现出与它们的高温对应物类似的性能，包括0.8cm/sup 2/V/sup-1/s/sup-1/的场效应迁移率（/spl mu/sub FE/）、4.5V的阈值电压（V/sub T/）和0.5V/dec的亚阈值斜率，并且可以用于包括有机发光二极管（OLED）显示器的有源矩阵（AM）显示器。在75/spl deg/C下制备的a-Si：H TFT表现出0.6 cm/sup 2/V/sup-1/s/sup-1/的/spl mu/sub FE/和4 V的V/sub T/。结果表明，通过使用n/sup +/ nc-Si接触层和等离子体处理栅极电介质与沟道层之间的界面，可以实现TFT性能的进一步改善。结果表明，通过适当的工艺优化，大面积薄膜硅技术很适合在低成本塑料基板上制造电子器件。
This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.