Synthesis of low power clock trees for handling power-supply variations
Synthesis of low power clock trees for handling power-supply variations
复制标题
用于处理电源变化的低功耗时钟树的综合
DOI：
10.1145/1960397.1960408
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发表时间：
2011
期刊：
影响因子：
--
通讯作者：
Cheng
中科院分区：
文献类型：
--
作者：
Shashank Bujimalla;Cheng
2010年国际物理设计研讨会（ISPD）竞赛提出了一项挑战，即如何合成能够承受严重电源和线宽变化的时钟分配网络。特别地，鲁棒的时钟网络应该满足本地时钟偏斜（LCS）约束，即，即使在存在变化的情况下，比用户指定的距离更近的任何一对时序元件之间的时钟偏斜也低于用户指定的极限。在本文中，我们确定了一些因素，有助于容忍这些变化的时钟树。我们提出的时钟树路由器使用两个阶段的流程来构建低功耗的时钟树，其中LCS的约束得到满足。我们的时钟树路由器已经过测试ISPD'10竞赛基准电路。广泛的蒙特-卡罗模拟表明，低功耗时钟树解决方案可以有效地处理变化，即使我们在实验设置中施加更严格的条件。
The International Symposium on Physical Design (ISPD) 2010 contest presents the challenge of synthesizing clock distribution networks that are tolerant to severe power-supply and wire-width variations. In particular, a robust clock network should satisfy the local clock skew (LCS) constraint, i.e., the clock skew between any pair of sequential elements that are closer than a user-specified distance is below a user-specified limit, even in the presence of variations. In this paper, we identify a few factors that help in tolerating these variations in clock trees. Our proposed clock tree router uses a two-stage flow to construct low-power clock trees for which the LCS constraints are met. Our clock tree router has been tested on ISPD'10 contest benchmark circuits. Extensive Monte-Carlo simulations showed that low power clock tree solutions could effectively handle variations, even when we imposed more stringent conditions in the experimental setup.