Development of a new high holding voltage SCR-based ESD protection structure
Development of a new high holding voltage SCR-based ESD protection structure
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DOI：
10.1109/relphy.2008.4558856
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发表时间：
2008-07
期刊：
影响因子：
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通讯作者：
G. Meneghesso;A. Tazzoli;F. A. Marino;M. Cordoni;P. Colombo
中科院分区：
文献类型：
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作者：
G. Meneghesso;A. Tazzoli;F. A. Marino;M. Cordoni;P. Colombo
一种新型的可控硅低电压触发（SCR-LVT），采用静电放电（ESD）事件的保护结构，已开发和表征。由于插入了两个寄生双极型晶体管，在传统的SCR结构上增加了一个n埋区，从而获得了高的保持电压。这两个寄生晶体管部分破坏了两个主npn和pnp BJT的环路反馈增益，导致ESD事件期间维持（保持）电压增加。一个强大的依赖性的保持电压与ESD脉冲宽度也被观察到，所造成的自热效应。已经执行了2D器件模拟（DESSIS Synopsys），获得了在宽温度范围（25摄氏度-125摄氏度）内完全拟合测量的结果。使用器件模拟结果，影响保持电压的因素，在温度依赖性方面，但也在寄生BJT的行为，解释。还提出了在不改变工艺参数的情况下改变与SCR设计布局相关的SCR保持电压的指导方针。
A new silicon controlled rectifier low voltage triggered (SCR-LVT), to be adopted as protection structure against electrostatic discharge (ESD) events, has been developed and characterized. A high holding voltage has been obtained thanks to the insertion of two parasitic bipolar transistors, achieved adding a n-buried region to a conventional SCR structure. These two parasitic transistors partially destroy the loop feedback gain of the two main npn and pnp BJTs, resulting in an increase of the sustaining (holding) voltage during the ESD event. A strong dependence of the holding voltage with the ESD pulse width has also been observed, caused by self-heating effects. 2D device simulations (DESSIS Synopsys) have been performed obtaining results that perfectly fit the measurements over a wide temperature range (25 degC-125 degC). Using device simulation results , the factors that influence the holding voltage, in terms of temperature dependence, but also in the behavior of the parasitic BJTs, are explained. A guideline to change the SCR holding voltage, related to the SCR design layout without any change to process parameters, is also proposed.