Self-Adjusting Deadtime Generator for High-Efficiency High-Voltage Switched-Mode Power Amplifiers
Self-Adjusting Deadtime Generator for High-Efficiency High-Voltage Switched-Mode Power Amplifiers
复制标题
用于高效高压开关模式功率放大器的自调节死区时间发生器
DOI：
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发表时间：
2020
期刊：
影响因子：
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通讯作者：
Y. Savaria
中科院分区：
文献类型：
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作者：
Ahmed Abuelnasr;Mohamed Ali;Mostafa Amer;Morteza Nabavi;Ahmad Hassan;B. Gosselin;Y. Savaria
在本文中，我们提出了一种新的设计方法，为高效率的功率放大器的死区时间发生器。它包括一个两相非重叠时钟电路和电平下移器。在D类功率放大器电路中实现了3%的效率提高，最大效率为94%。所提出的设计产生了一个死区时间低至16.7ns，并消除了高侧和低侧栅极驱动器之间的传播延迟失配的问题。该电路采用50V AMS 0.35 μm CMOS工艺实现。空载时间发生器消耗16.5 mW，同时占用0.068 mm2的总面积。
In this paper, we propose a novel design methodology for a deadtime generator for high-efficiency power amplifiers. It consists of a two-phase non-overlapping clock circuit and level down shifters. A 3% improvement in efficiency is achieved with a maximum efficiency of 94% in a class-D power amplifier circuit. The proposed design generates a deadtime as low as 16.7ns and eliminates the problem of propagation delay mismatch between high side and low side gate drivers. The circuit is implemented in 50V AMS 0.35 μm CMOS technology. The deadtime generator consumes 16.5 mW, while occupying a total area of 0.068 mm2.