Silicon Tunneling Field-Effect Transistors With Tunneling in Line With the Gate Field
Silicon Tunneling Field-Effect Transistors With Tunneling in Line With the Gate Field
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DOI：
10.1109/led.2012.2228250
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发表时间：
2013-02-01
影响因子：
4.9
通讯作者：
Schulze, Joerg
中科院分区：
文献类型：
--
作者：
Fischer, Inga A.;Bakibillah, A. S. M.;Schulze, Joerg
本文介绍了垂直硅隧穿场效应晶体管（tfet）的制备和表征的实验结果，其器件几何形状与栅极场一致。与没有这种几何结构修改的垂直Si tfet相比，在V- ds = 0.5 V时，导通电流增加了一个数量级以上，I-ON = 1.1 μ A/ μ m， n通道工作时的I-ON/I-OFF比为3.4.10(4)。我们对设备改进提出了进一步的建议。
We present experimental results on the fabrication and characterization of vertical Si tunneling field-effect transistors (TFETs) in a device geometry with tunneling in line with the gate field. Compared to vertical Si TFETs without this geometry modification, on-currents are increased by more than one order of magnitude with I-ON = 1.1 mu A/mu m at V-DS = 0.5 V and an I-ON/I-OFF ratio of 3.4.10(4) in n-channel operation. We present further suggestions for device improvements.