Match-making for Monolithic 3D IC: Finding the right technology node

Match-making for Monolithic 3D IC: Finding the right technology node
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单片 3D IC 匹配:寻找合适的技术节点

DOI:
10.1145/2897937.2898043
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发表时间:
2016
期刊:
2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)
影响因子:
--
通讯作者:
S. Lim
S. Lim
中科院分区:
--
文献类型:
--
作者:
Kyungwook Chang;S. Sinha;B. Cline;G. Yeric;S. Lim

文献摘要

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单片3D集成电路(M3 D)有可能在功耗和性能扩展挑战方面取得突破。我们首次在多个技术节点的商业设计上对M3 D进行了全面的研究。M3 D的性能和功耗影响是使用一个商业的,有序的,32位应用处理器,在代工28纳米和14/16纳米工艺节点,以及预测的7纳米节点上实现的。我们研究了影响M3 D效率的技术节点因素,并提出了一个最佳技术和设计交互的路线图,以实现M3 D的全部权利。
Monolithic 3D IC (M3D) has the potential to provide a break-through in the power and performance scaling challenges. We, for the first time, present a comprehensive study of M3D on a commercial design across multiple technology nodes. The performance and power impact of M3D is investigated using a commercial, in-order, 32-bit application processor, implemented on foundry 28nm and 14/16nm process nodes, as well as a predictive 7nm node. We study the factors across the technology nodes that affect the efficiency of M3D, and propose a roadmap for optimum technology and design interaction that will enable the full entitlement of M3D.