Heterogeneous Interconnect Stitching Technology With Compressible MicroInterconnects for Dense Multi-Die Integration
Heterogeneous Interconnect Stitching Technology With Compressible MicroInterconnects for Dense Multi-Die Integration
复制标题
具有可压缩微互连的异构互连拼接技术，用于密集多芯片集成
DOI：
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发表时间：
2017
影响因子：
4.9
通讯作者：
M. Bakir
中科院分区：
文献类型：
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作者：
Xuchen Zhang;Paul K. Jo;Muneeb Zia;G. May;M. Bakir
本文提出了一种异构互连拼接技术。具有高密度细间距线的缝合芯片被放置在基板和有源芯片之间。细间距微凸点用于键合芯片，并提供高密度和低能量的信号。可压缩微互连（CMI）用于补偿封装非平面性并实现芯片-封装互连。制作并组装了一个由两个无源芯片和一个缝合芯片组成的测试平台。测量微凸块和CMI的组装后电阻值以及CMI的机械顺应性。微凸点的电阻范围为77.8 ~<inline-formula><tex-math notation="LaTeX">188.3 μ Ω</tex-math></inline-formula>，CMI的电阻范围为141.2 ~ 252.9 <inline-formula><tex-math notation="LaTeX">μ Ω ext{m}Omega $</tex-math></inline-formula>。CMI的机械柔量约为13.7 mm/N，垂直弹性变形高达<inline-formula><tex-math notation="LaTeX">30 μ m ext{m}$</tex-math></inline-formula>。
In this letter, a heterogeneous interconnect stitching technology is proposed. Stitch chips with high-density fine pitch wires are placed between the substrate and the active chips. Fine-pitch microbumps are used to bond the chips and provide high density and low-energy signaling. Compressible microinterconnects (CMIs) are used to compensate for package non-planarity and enable chip-package interconnection. A testbed with two passive chips and one stitch chip was fabricated and assembled. The post-assembly electrical resistance values of the microbumps and CMIs, as well as the mechanical compliance of the CMIs, are measured. The resistance of the microbumps ranges from 77.8 to <inline-formula> <tex-math notation="LaTeX">$188.3~mu Omega $ </tex-math></inline-formula> and the resistance of the CMIs ranges from 141.2 to 252.9 <inline-formula> <tex-math notation="LaTeX">$ ext{m}Omega $ </tex-math></inline-formula>. The mechanical compliance of the CMI is approximately 13.7 mm/N with a vertical elastic deformation of up to <inline-formula> <tex-math notation="LaTeX">$30~mu ext{m}$ </tex-math></inline-formula>.