Within-Die Delay Variation Measurement and Power Transient Analysis Using REBEL
Within-Die Delay Variation Measurement and Power Transient Analysis Using REBEL
复制标题
使用 REBEL 进行芯片内延迟变化测量和功率瞬态分析
DOI：
10.1109/tvlsi.2014.2318307
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发表时间：
2015
影响因子：
2.8
通讯作者：
J. Plusquellic
中科院分区：
文献类型：
--
作者：
F. Saqib;Dylan Ismari;Charles Lamech;J. Plusquellic
Variations in path delays are increasing with scaling, and are increasingly affected by neighborhood interactions. To fully characterize within-die variations, delays must be measured in the context of actual core-logic macros using embedded test structures (ETSs). In this brief, we propose an ETS called regional delay behavior (REBEL) that is designed to measure path delays in a minimally invasive fashion. REBEL provides capabilities similar to an off-chip logic analyzer. We implemented REBEL in a 90-nm test chip and present results on within-die path delay variations in a floating point unit. We also analyze the impact on delay when the chips are subjected to industrial-level temperature and voltage variations.
