Impact of nanowire variability on performance and reliability of gate-all-around III-V MOSFETs
Impact of nanowire variability on performance and reliability of gate-all-around III-V MOSFETs
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纳米线变异性对环栅 III-V MOSFET 性能和可靠性的影响
DOI：
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发表时间：
2013
期刊：
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通讯作者：
M. Alam
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文献类型：
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作者：
S. Shin;M. Masuduzzaman;J. Gu;M. A. Wahab;N. Conrad;M. Si;P. Ye;M. Alam
栅极全包围（GAA）晶体管使用多个平行纳米线来实现期望的导通电流。已经报道了GAA晶体管的制造和性能，然而，一个基本的考虑因素，即晶体管性能的缩放和可变性作为并联NW的数量的函数，还有待讨论。在本文中，我们（i）研究如何整体性能矩阵（例如，ION、IOFF、Vth、SS、RC）取决于并行NW的数量，（ii）从理论上解释NW之间的可变性和自加热方面的结果，（iii）将多个NW器件的可靠性（ΔVth、ΔSS、应力和恢复）与类似技术的平面器件进行比较。我们发现，自加热和NW到NW的可变性反映在GAA晶体管的可变性和可靠性的新特性中，这些特性在相应的平面技术中既没有预料到也没有观察到。
Gate-all-around (GAA) transistors use multiple parallel nanowires to achieve the desired ON current. The fabrication and performance of GAA transistors have been reported, however, a fundamental consideration, namely, the scaling and variability of transistor performance as a function of the number of parallel NWs is yet to be discussed. In this paper, we (i) examine how the overall performance matrix (e.g., ION, IOFF, Vth, SS, RC) depends on the number of parallel NWs, (ii) theoretically interpret the results in terms of variability and self-heating among the NWs, (iii) compare the reliability of multiple NW devices (ΔVth, ΔSS, both stress and recovery) with a planar device of similar technology. We find that the self-heating and NW-to-NW variability are reflected in novel properties of variability and reliability of GAA transistors that are neither anticipated nor observed in the corresponding planar technology.