Analysis of Self-Heating Effects in Ultrathin-Body SOI MOSFETs by Device Simulation
Analysis of Self-Heating Effects in Ultrathin-Body SOI MOSFETs by Device Simulation
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DOI：
10.1109/ted.2007.911354
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发表时间：
2008
影响因子：
3.1
通讯作者：
C. Fiegna;Yang Yang-Yang;E. Sangiorgi;A. O'Neill
中科院分区：
文献类型：
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作者：
C. Fiegna;Yang Yang-Yang;E. Sangiorgi;A. O'Neill
本文讨论了绝缘体上硅（SOI） CMOS技术中的自热效应，并应用器件仿真分析了热效应对纳米级SOI n- mosfet工作的影响。在分析中采用了二维漂移-扩散电热模拟，使用了根据蒙特卡罗模拟在不同温度下校准的电子传递模型。我们报道了器件结构参数，如SOI层厚度、埋氧化物（BOX）厚度、源/漏极（S/D）延伸长度和上升S/D区厚度，对纳米级mosfet的SHE的影响。由于采用薄硅层和BOX的低导热性，SHE效应变得显着，导致高性能数字电路在标称操作条件下温度升高。SOI mosfet的交流性能也受到影响，特别是，通过数值电热器件模拟预测了极短mosfet的截止频率严重下降。虽然发现SHE对设备性能的影响不大，并且可以通过设备设计来减轻，但它们可能导致长期可靠性的降低。
This paper discusses self-heating (SHE) effects in silicon-on-insulator (SOI) CMOS technology and applies device simulation to analyze the impact of thermal effects on the operation of nanoscale SOI n-MOSFETs. A 2-D drift-diffusion electrothermal simulation, using an electron transport model calibrated against Monte Carlo simulations at various temperatures, is employed in the analysis. We report the effects of device-structure parameters, such as SOI layer thickness, buried-oxide (BOX) thickness, source/drain (S/D) extension length, and thickness of the elevated S/D region, on the SHE of nanoscale MOSFETs. The SHE effects become significant due to the adoption of thin silicon layers and to the low thermal conductivity of the BOX, leading to the rise of large temperature under nominal operation conditions for high-performance digital circuits. The ac performance of SOI MOSFETs is influenced as well, and in particular, a severe degradation of the cutoff frequency of very short MOSFETs is predicted by numerical electrothermal device simulations. Although the effects of SHE on device performance are found to be somewhat modest and might be mitigated through device design, they may result in a degradation of the long-term reliability.