A Fully Integrated 60-GHz CMOS Transceiver Chipset Based on WiGig/IEEE 802.11ad With Built-In Self Calibration for Mobile Usage
A Fully Integrated 60-GHz CMOS Transceiver Chipset Based on WiGig/IEEE 802.11ad With Built-In Self Calibration for Mobile Usage
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DOI：
10.1109/jssc.2013.2279573
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发表时间：
2013-12-01
影响因子：
5.4
通讯作者：
Takinami, Koji
中科院分区：
文献类型：
--
作者：
Saito, Noriaki;Tsukizawa, Takayuki;Takinami, Koji
本文提出了一种基于WiGig/IEEE 802.11ad标准的全集成收发器芯片组。该芯片组是为单载波（SC）调制而开发的，适用于降低功耗。然而，SC调制对带内幅度变化很敏感，主要是模拟电路的增益变化和多径延迟扩展造成的。为了补偿这些增益变化，提出的芯片组采用内置的TX带内校准和RX频域均衡器（FDE）。所提出的技术放宽了对高速模拟电路的要求，导致更低的功耗，同时最大限度地减少硬件尺寸的增加。测试芯片在长达40厘米的距离内实现1.8 Gb/s的MAC吞吐量，在长达1米的距离内实现1.5 Gb/s的MAC吞吐量，同时在TX模式下消耗788 mW，在RX模式下消耗984 mW。
This paper presents a fully integrated transceiver chipset based on the WiGig/IEEE 802.11ad standard targeting mobile usage. The chipset is developed for single-carrier (SC) modulation, which is suitable for reduced power consumption. However, the SC modulation is sensitive to in-band amplitude variations, mainly made worse by the gain variations of analog circuits and multipath delay spread. In order to compensate for these gain variations, the proposed chipset employs built-in TX in-band calibration and an RX frequency domain equalizer (FDE). The proposed techniques relax the requirement for high speed analog circuits, leading to less power consumption while minimizing the increase of hardware size. The test chip achieves 1.8 Gb/s MAC throughput for up to 40 cm and 1.5 Gb/s for up to 1 m while consuming 788 mW in TX and 984 mW in RX mode.