SiGe HBT with fx/fmax of 505 GHz/720 GHz

SiGe HBT with fx/fmax of 505 GHz/720 GHz
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DOI：
10.1109/iedm.2016.7838335
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发表时间：
2016-12
期刊：
2016 IEEE International Electron Devices Meeting (IEDM)
影响因子：
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通讯作者：
B. Heinemann;Holger Rücker;R. Barth;F. Barwolf;J. Drews;G. Fischer;A. Fox;O. Fursenko;T. Grabolla;F. Herzel;J. Katzer;J. Korn;A. Kruger;P. Kulse;T. Lenke;M. Lisker;S. Marschmeyer;A. Scheit;D. Schmidt;J. Schmidt;M. Schubert;A. Trusch;Ch. Wipf;D. Wolansky
B. Heinemann;Holger Rücker;R. Barth;F. Barwolf;J. Drews;G. Fischer;A. Fox;O. Fursenko;T. Grabolla;F. Herzel;J. Katzer;J. Korn;A. Kruger;P. Kulse;T. Lenke;M. Lisker;S. Marschmeyer;A. Scheit;D. Schmidt;J. Schmidt;M. Schubert;A. Trusch;Ch. Wipf;D. Wolansky
中科院分区：
其他
文献类型：
--
作者：
B. Heinemann;Holger Rücker;R. Barth;F. Barwolf;J. Drews;G. Fischer;A. Fox;O. Fursenko;T. Grabolla;F. Herzel;J. Katzer;J. Korn;A. Kruger;P. Kulse;T. Lenke;M. Lisker;S. Marschmeyer;A. Scheit;D. Schmidt;J. Schmidt;M. Schubert;A. Trusch;Ch. Wipf;D. Wolansky

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介绍了一种实验SiGe HBT工艺，其fT/fmax/BVCEO = 505 GHz/720 GHz/1.6 V，CML环形振荡器的最小门延迟为1.34 ps。与我们之前的SiGe HBT开发相比，速度的提高主要源于优化的垂直剖面，通过将毫秒退火与低温后端相结合，以及横向器件缩放，可以进一步降低基极和发射极电阻。
An experimental SiGe HBT technology featuring fT/fmax/BVCEO = 505 GHz/720 GHz/1.6 V and a minimum CML ring oscillator gate delay of 1.34 ps is presented. The improved speed compared to our previous SiGe HBT developments originates primarily from an optimized vertical profile, an additional decrease of the base and emitter resistance which is made possible by combining millisecond annealing with a low-temperature backend, and from lateral device scaling.