An on-die all-digital delay measurement circuit with 250fs accuracy
An on-die all-digital delay measurement circuit with 250fs accuracy
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精度为 250fs 的片上全数字延迟测量电路
DOI：
10.1109/vlsic.2012.6243808
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发表时间：
2012
期刊：
影响因子：
--
通讯作者：
F. O’Mahony
中科院分区：
文献类型：
--
作者：
M. Mansuri;B. Casper;F. O’Mahony
本文介绍了一种能准确表征全相旋转内插器等关键时钟电路的现场时延测量电路。该片内全数字电路产生的数字输出值与两个时钟之间的相对延迟成正比，归一化为时钟周期。该电路不需要校准变化或工艺、电压、温度(PVT)，测量延迟的绝对精度和重复性为10fS-rms。
This paper demonstrates an in-situ delay measurement circuit which precisely characterizes key clocking circuits such as full phase rotation interpolators. This on-die all-digital circuit produces a digital output value proportional to the relative delay between two clocks, normalized to the clock period. This circuit requires no calibration for variation or process, voltage, temperature (PVT) and measures the delay with 250fs absolute accuracy and repeatability of 10fs-rms.