Investigation of Timing Parameters in Single-Flux-Quantum Circuits Using Low Critical-Current Junctions and Low Bias Voltages
Investigation of Timing Parameters in Single-Flux-Quantum Circuits Using Low Critical-Current Junctions and Low Bias Voltages
复制标题
使用低临界电流结和低偏置电压的单通量量子电路中的时序参数研究
DOI:
10.1109/tasc.2021.3067827
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发表时间:
2021
影响因子:
1.8
通讯作者:
and A. Fujimaki
中科院分区:
文献类型:
--
作者:
M. Kuniyoshi;K. Murase;I. Nagaoka;K. Sano;M. Tanaka;T. Yamashita;and A. Fujimaki
In this study, the trade-off among power consumptions, operating frequencies, and error rates in low-power single-flux-quantum (SFQ) circuit is investigated. The power consumption of SFQ circuits can be reduced by the lowering critical currents (values) of the Josephson junctions (JJs), or the bias voltage (). The shifts and spreads of timing parameter fluctuations whenandwere lowered were numerically analyzed, with consideration of thermal noise at 4.2 K. The timing behaviors afterwas lowered were relatively simple, being based on the signal-to-noise ratio, whereas those for loweredvalues were complicated because of the dynamic behaviors of JJs driven at reduced voltage. The simulation results imply that the operating frequencies decreased because the timing windows narrowed, but the highest energy efficiency was obtained when we loweredorto 6.25% of their conventional values, and the energy reduction after lowering ofwas 26% better than that after lowering of. Moreover, if a small error rate (for example) is acceptable, further improvement in energy efficiency would be expected at significantly higher clock frequencies than would be the case if the SFQ circuit must exhibit error-free operation.