A Memory Heterogeneity-Aware Runtime System for Bandwidth-Sensitive HPC Applications
A Memory Heterogeneity-Aware Runtime System for Bandwidth-Sensitive HPC Applications
复制标题
适用于带宽敏感型 HPC 应用程序的内存异构感知运行时系统
DOI：
10.1109/ipdpsw.2017.168
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发表时间：
2017
期刊：
影响因子：
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通讯作者：
L. Kalé
中科院分区：
文献类型：
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作者：
K. Chandrasekar;Xiang Ni;L. Kalé
当今的超级计算机正在朝着部署多核处理器（例如英特尔Xeon Phi骑士登陆（KNL））的部署，以实现高计算和记忆力。在具有改进的矢量化的此类多核平台上执行的应用程序需要高内存带宽。为了提高性能，除了高容量但低的带宽DDR4之外，骑士降落等体系结构包括高带宽和低容量内包装高带宽内存（HBM）。 NVIDIA的Pascal GPU等其他体系结构也暴露了类似的DRAM。在节点内的内存类型中具有异质性的体系结构中，如果从高带宽内存中提供所有数据请求，则有效的分配和数据移动可能会改善将来系统的性能和节能。在本文中，我们提出了一个内存杂种感知运行时系统，该系统可以指导数据预取驱逐和驱逐，以便可以在高带宽处访问数据，以适用于整个工作集不适合高带宽内存，并且需要在不同的不同的带宽内存中移动数据。内存类型。我们实施了由运行时系统管理的数据移动机制，该机制允许应用程序在具有异构内存层次结构的体系结构上有效运行，并且具有琐碎的代码更改。我们显示出重要的HPC内核的模板3D和矩阵乘法的执行时间最高可提高2倍。
Today's supercomputers are moving towards deployment of many-core processors like Intel Xeon Phi Knights Landing (KNL), to deliver high compute and memory capacity. Applications executing on such many-core platforms with improved vectorization require high memory bandwidth. To improve performance, architectures like Knights Landing include a high bandwidth and low capacity in-package high bandwidth memory (HBM) in addition to the high capacity but low bandwidth DDR4. Other architectures like Nvidia's Pascal GPU also expose similar stacked DRAM. In architectures with heterogeneity in memory types within a node, efficient allocation and data movement can result in improved performance and energy savings in future systems if all the data requests are served from the high bandwidth memory. In this paper, we propose a memory-heterogeneity aware runtime system which guides data prefetch and eviction such that data can be accessed at high bandwidth for applications whose entire working set does not fit within the high bandwidth memory and data needs to be moved among different memory types. We implement a data movement mechanism managed by the runtime system which allows applications to run efficiently on architectures with heterogeneous memory hierarchy, with trivial code changes. We show upto 2X improvement in execution time for Stencil3D and Matrix Multiplication which are important HPC kernels.